com.sun.spot.peripheral
Interface ISpiMaster

public interface ISpiMaster

Interface to the SPI master controller.

The SPI transfers are done by C code (in spi.c). The transfer is done using DMA in most cases (some small transfers don't bother with it).

Each call to the transfer operations defined in this interface require a SpiPcs parameter which defines the peripheral chip select that is to be used (ie which of the 4 channels) plus the configuration required.

The configuration is as per the SPI_CSRx register definition. Constants for the fields in the CSR are defined in this interface. Details can be found in the Atmel AT91RM9200 datasheet.

An example configuration would be:

(ISpiMaster.CSR_MODE0 | ISpiMaster.CSR_BITS_8 | ISpiMaster.CSR_SCBR_250K | ISpiMaster.CSR_DLYBCT_200)

See Also:

AT91 Spec

Field Summary

static int	CSR_BITS_10 The unit of transfer is 10 bits
static int	CSR_BITS_11 The unit of transfer is 11 bits
static int	CSR_BITS_12 The unit of transfer is 12 bits
static int	CSR_BITS_13 The unit of transfer is 13 bits
static int	CSR_BITS_14 The unit of transfer is 14 bits
static int	CSR_BITS_15 The unit of transfer is 15 bits
static int	CSR_BITS_16 The unit of transfer is 16 bits
static int	CSR_BITS_8 The unit of transfer is 8 bits
static int	CSR_BITS_9 The unit of transfer is 9 bits
static int	CSR_CPOL The inactive state value of SPCK is logic level one
static int	CSR_DLYBCT Bit mask for field that controls the delay between consecutive transfers (e.g. between bytes if CSR_BITS_8), and the delay after the last transfer before CS is released.
static int	CSR_DLYBCT_1 Select a value of 1 (533ns) for DLYBCT
static int	CSR_DLYBCT_10 Select a value of 10 (5.33us) for DLYBCT
static int	CSR_DLYBCT_100 Select a value of 100 (53.3us) for DLYBCT
static int	CSR_DLYBCT_2 Select a value of 2 (1.06us) for DLYBCT
static int	CSR_DLYBCT_200 Select a value of 200 (106.6us) for DLYBCT
static int	CSR_DLYBCT_50 Select a value of 50 (26.6us) for DLYBCT
static int	CSR_DLYBS Bit mask for field that controls the delay before the transfer starts after CS goes active.
static int	CSR_MODE0 Mode 0, as defined in the AT91 spec (this is the most common mode).
static int	CSR_MODE1 Mode 1, as defined in the AT91 spec.
static int	CSR_MODE2 Mode 2, as defined in the AT91 spec.
static int	CSR_MODE3 Mode 3, as defined in the AT91 spec.
static int	CSR_NCPHA Data is captured on the leading edge of SPCK and changed on the following edge of SPCK
static int	CSR_SCBR Bit mask for clock rate selector
static int	CSR_SCBR_1MHZ 1 MHz clock rate
static int	CSR_SCBR_250K 250 KHz clock rate
static int	CSR_SCBR_2MHZ 2 MHz clock rate
static int	CSR_SCBR_3MHZ 3 MHz clock rate
static int	CSR_SCBR_6MHZ 6 MHz clock rate

Method Summary

void	sendAndReceive(SpiPcs pcs, int txSize, byte[] tx, int rxOffset, int rxSize, byte[] rx) General SPI send and receive
void	sendAndReceive(SpiPcs pcs, int deviceAddress, int txSize, byte[] tx, int rxOffset, int rxSize, byte[] rx) General SPI send and receive
int	sendReceive8(SpiPcs pcs, int data) SPI send of 8 bits, plus simultaneous receive of 8 bits
int	sendReceive8PlusReceive16(SpiPcs pcs, int first) SPI send of 8 bits, plus simultaneous receive of 8 bits, then receive 16 bits
int	sendReceive8PlusSend16(SpiPcs pcs, int first, int subsequent) SPI send of 8 bits, plus simultaneous receive of 8 bits, then send 16 bits
int	sendReceive8PlusSendN(SpiPcs pcs, int first, int size, byte[] subsequent) SPI send of 8 bits, simultaneous receive of 8 bits, then send of multiple 8 bits
int	sendReceive8PlusVariableReceiveN(SpiPcs pcs, int first, byte[] subsequent, PIOPin fifo_pin) Specialised SPI send of 8 bits, simultaneous receive of 8 bits, then receive of multiple 8 bits This routine is highly specialised for the CC2420 the number of bytes received is determined by the 7 bit value read as the first byte after the initial 8 bits
void	setLoopback(boolean b) Allows the loopback feature to be turned on and off.

Field Detail

CSR_CPOL

static final int CSR_CPOL

The inactive state value of SPCK is logic level one

See Also:

Constant Field Values

CSR_NCPHA

static final int CSR_NCPHA

Data is captured on the leading edge of SPCK and changed on the following edge of SPCK

See Also:

Constant Field Values

CSR_MODE0

static final int CSR_MODE0

Mode 0, as defined in the AT91 spec (this is the most common mode). CPOL=0, NCPHA=1 Clock is active high, data is captured on the leading edge.

See Also:

Constant Field Values

CSR_MODE1

static final int CSR_MODE1

Mode 1, as defined in the AT91 spec. CPOL=0, NCPHA=0 Clock is active high, data is captured on the trailing edge.

See Also:

Constant Field Values

CSR_MODE2

static final int CSR_MODE2

Mode 2, as defined in the AT91 spec. CPOL=1, NCPHA=1 Clock is active low, data is captured on the leading edge.

See Also:

Constant Field Values

CSR_MODE3

static final int CSR_MODE3

Mode 3, as defined in the AT91 spec. CPOL=1, NCPHA=0 Clock is active low, data is captured on the trailing edge.

See Also:

Constant Field Values

CSR_BITS_8

static final int CSR_BITS_8

The unit of transfer is 8 bits

See Also:

Constant Field Values

CSR_BITS_9

static final int CSR_BITS_9

The unit of transfer is 9 bits

See Also:

Constant Field Values

CSR_BITS_10

static final int CSR_BITS_10

The unit of transfer is 10 bits

See Also:

Constant Field Values

CSR_BITS_11

static final int CSR_BITS_11

The unit of transfer is 11 bits

See Also:

Constant Field Values

CSR_BITS_12

static final int CSR_BITS_12

The unit of transfer is 12 bits

See Also:

Constant Field Values

CSR_BITS_13

static final int CSR_BITS_13

The unit of transfer is 13 bits

See Also:

Constant Field Values

CSR_BITS_14

static final int CSR_BITS_14

The unit of transfer is 14 bits

See Also:

Constant Field Values

CSR_BITS_15

static final int CSR_BITS_15

The unit of transfer is 15 bits

See Also:

Constant Field Values

CSR_BITS_16

static final int CSR_BITS_16

The unit of transfer is 16 bits

See Also:

Constant Field Values

CSR_SCBR

static final int CSR_SCBR

Bit mask for clock rate selector

See Also:

Constant Field Values

CSR_SCBR_1MHZ

static final int CSR_SCBR_1MHZ

1 MHz clock rate

See Also:

Constant Field Values

CSR_SCBR_2MHZ

static final int CSR_SCBR_2MHZ

2 MHz clock rate

See Also:

Constant Field Values

CSR_SCBR_3MHZ

static final int CSR_SCBR_3MHZ

3 MHz clock rate

See Also:

Constant Field Values

CSR_SCBR_6MHZ

static final int CSR_SCBR_6MHZ

6 MHz clock rate

See Also:

Constant Field Values

CSR_SCBR_250K

static final int CSR_SCBR_250K

250 KHz clock rate

See Also:

Constant Field Values

CSR_DLYBS

static final int CSR_DLYBS

Bit mask for field that controls the delay before the transfer starts after CS goes active. Set this field to insert a delay (0 gives 8ns delay, 1 gives 16ns, 0xFF gives 4.25us).

See Also:

Constant Field Values

CSR_DLYBCT

static final int CSR_DLYBCT

Bit mask for field that controls the delay between consecutive transfers (e.g. between bytes if CSR_BITS_8), and the delay after the last transfer before CS is released. Set this non-zero to insert a delay. (0 is special and gives 66ns delay, 1 gives 533ns, 0xFF gives 136us).

See Also:

Constant Field Values

CSR_DLYBCT_1

static final int CSR_DLYBCT_1

Select a value of 1 (533ns) for DLYBCT

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Constant Field Values

CSR_DLYBCT_2

static final int CSR_DLYBCT_2

Select a value of 2 (1.06us) for DLYBCT

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Constant Field Values

CSR_DLYBCT_10

static final int CSR_DLYBCT_10

Select a value of 10 (5.33us) for DLYBCT

See Also:

Constant Field Values

CSR_DLYBCT_50

static final int CSR_DLYBCT_50

Select a value of 50 (26.6us) for DLYBCT

See Also:

Constant Field Values

CSR_DLYBCT_100

static final int CSR_DLYBCT_100

Select a value of 100 (53.3us) for DLYBCT

See Also:

Constant Field Values

CSR_DLYBCT_200

static final int CSR_DLYBCT_200

Select a value of 200 (106.6us) for DLYBCT

See Also:

Constant Field Values

Method Detail

sendReceive8

int sendReceive8(SpiPcs pcs,
                 int data)

SPI send of 8 bits, plus simultaneous receive of 8 bits

Parameters:

pcs - SPI Peripheral Chip Select to use

data - the data to send in bits 7:0

Returns:

byte received in bits 7:0 of int

sendReceive8PlusSend16

int sendReceive8PlusSend16(SpiPcs pcs,
                           int first,
                           int subsequent)

SPI send of 8 bits, plus simultaneous receive of 8 bits, then send 16 bits

Parameters:

pcs - SPI Peripheral Chip Select to use

first - the data to send in bits 0:7

subsequent - the subsequent bytes to send, bits 15:8 then bits 7:0

Returns:

byte received in bits 7:0 of int

sendReceive8PlusSendN

int sendReceive8PlusSendN(SpiPcs pcs,
                          int first,
                          int size,
                          byte[] subsequent)

SPI send of 8 bits, simultaneous receive of 8 bits, then send of multiple 8 bits

Parameters:

pcs - SPI Peripheral Chip Select to use

first - the first 8 bits to send in bits 7:0

size - number of bytes to send

subsequent - the bytes to send

Returns:

byte received in bits 0:7 of int

sendAndReceive

void sendAndReceive(SpiPcs pcs,
                    int txSize,
                    byte[] tx,
                    int rxOffset,
                    int rxSize,
                    byte[] rx)

General SPI send and receive

Parameters:

pcs - SPI Peripheral Chip Select to use

txSize - the number of bytes to send

tx - the bytes to send

rxOffset - positive integer indicating the number of bytes transmitted before rx begins

rxSize - the number of bytes to receive

rx - buffer for the received bytes

sendAndReceive

void sendAndReceive(SpiPcs pcs,
                    int deviceAddress,
                    int txSize,
                    byte[] tx,
                    int rxOffset,
                    int rxSize,
                    byte[] rx)

General SPI send and receive

Parameters:

pcs - SPI Peripheral Chip Select to use

deviceAddress - Board device address to use

txSize - the number of bytes to send

tx - the bytes to send

rxOffset - positive integer indicating the number of bytes transmitted before rx begins

rxSize - the number of bytes to receive

rx - buffer for the received bytes

sendReceive8PlusReceive16

int sendReceive8PlusReceive16(SpiPcs pcs,
                              int first)

SPI send of 8 bits, plus simultaneous receive of 8 bits, then receive 16 bits

Parameters:

pcs - SPI Peripheral Chip Select to use

first - the data to send in bits 0:7

Returns:

bytes received, first in bits 7:0, second in bits 23:16, third in bits 15:8

sendReceive8PlusVariableReceiveN

int sendReceive8PlusVariableReceiveN(SpiPcs pcs,
                                     int first,
                                     byte[] subsequent,
                                     PIOPin fifo_pin)

Specialised SPI send of 8 bits, simultaneous receive of 8 bits, then receive of multiple 8 bits

This routine is highly specialised for the CC2420

the number of bytes received is determined by the 7 bit value read as the first byte after the initial 8 bits

Parameters:

pcs - SPI Peripheral Chip Select to use

first - the first 8 bits to send in bits 7:0

subsequent - byte array to receive data; length (max 127 not including length byte) will be written into first byte

fifo_pin - pin to test for overflow. The INVERSE state of this bit is written into the top bit of the length byte.

Returns:

bits 7:0 --> first 8 bits read

setLoopback

void setLoopback(boolean b)

Allows the loopback feature to be turned on and off. Loopback is useful for testing.

Parameters:

b - true to turn loopback on, false to turn it off